SRL is used to shift the 32 bits in the register specified by Operand 1 to the right.  The number of bits that are shifted is indicated by Operand 2.  The second operand address is not used to address data; instead, the base/displacement address is computed and the rightmost 6 bits are treated as a binary integer which represents the number of bits to be shifted.  We will call this value the “shift factor”.  This leads to two distinct ways of coding the shift factor:

 

   1)   Directly -  The shift factor is coded as a displacement.  Consider the example below.

 

                            SRL  R9,8

 

In the above shift, the second operand, 8, is treated as a base/displacement address where 8 is the displacement and the base register is omitted.  The effective address is 8. (See Explicit Addressing.)  When represented as an address the rightmost 6 bits still represent the number 8, and so the bits in register 9 are shifted to the right by 8 bits.

 

   2)  Indirectly -  The shift factor is placed in a register and the register is mentioned as the base register in the base/displacement address.

                           

                      L    R5,FACTOR    PUT SHIFT FACTOR IN REG

                      SRL  R9,0(R5)     NOW SHIFT INDIRECTLY

                      ...

               FACTOR DC   F’8’         SHIFT FACTOR IS 8 BITS

 

In this case, the effective address is computed by adding the contents of base register 5 (which is 8), with the displacement of 0.  The effective address is again 8, and the rightmost 6 bits of this address indicate that the shift factor is 8.

 

   Each method has its uses.  The direct method is useful in situations where the number of bits you want to shift is fixed.  Coding directly allows you to look at the instruction to determine the shift factor.  On the other hand, the indirect method allows the shift factor to be determined while the program is executing.  If the shift factor cannot be determined until the program is running, the indirect method must be used.

 

   When shifting logically, bits shifted out on the right are lost, while 0’s replace bits on the left.

 

   Consider the following instruction.

 

                            SRL  R8,6

 

This instruction represents a right shift of register 8 using a shift factor of 6.  The shift factor has been coded directly.  As a result, 6 bits, 110000, are shifted out of the register on the right.  Vacated bit positions on the left are replace by 0’s.  This is illustrated in the diagram below.

 

   This instruction has an RS format but the 4 low-order bits of the second byte are unused.

 

            Some Unrelated SRL’s

 

               R5 = B’11111111111111111111111111111111’

               R6 = B’11110000111100001111000011110000’

        

          SRL  R5,1     R5 = B’01111111111111111111111111111111’

          SRL  R5,2     R5 = B’00111111111111111111111111111111’

          SRL  R5,3     R5 = B’00011111111111111111111111111111’

          SRL  R5,31    R5 = B’00000000000000000000000000000001’

          SRL  R5,32    R5 = B’00000000000000000000000000000000’

          SRL  R6,4     R6 = B’00001111000011110000111100001111’

 

          L    R9,=F’3’

          SRL  R5,0(R9) R5 = B’00011111111111111111111111111111’

 

          L    R3,=F’5’

          SRL  R5,0(R3) R5 = B’00000111111111111111111111111111’